bobbybasketball_2006 | wtf\ | 00:44 |
TCC jman116 | macus that was a sick demo kill btw | 02:24 |
starship trooper | sadge | 04:23 |
kagamine | DAMN! | 04:37 |
bobbybasketball_2006 | why feed for me | 05:50 |
solstice | there was a call that u guys were left | 06:05 |
kagamine | CR8 - Provides read and write access to the Task Priority Register (TPR) | 06:21 |
TCC jman116 | bind b BOZO! | 06:28 |
Bluedino22 | cock and ball torture also known as CBT | 06:39 |
litr0 | lol | 07:14 |
solstice | kys | 07:17 |
kagamine | An I/O buffer that spans a range of contiguous virtual memory addresses can be spread over several physical pages. | 07:56 |
TCC jman116 | You could use some more contiguous virtual memory ngl | 08:09 |
kagamine | The operating system uses a memory descriptor list (MDL) to describe the physical page layout for a virtual memory buffer. | 08:11 |
kagamine | An MDL consists of an MDL structure that is followed by an array of data that describes the physical memory in which the I/O bu | 08:12 |
TCC jman116 | on god | 08:14 |
kagamine | You can allocate an MDL with the IoAllocateMdl routine. To free the MDL, use the IoFreeMdl routine. | 08:14 |
TCC jman116 | i agree | 08:16 |
Bluedino22 | I will post CBT | 08:21 |
kagamine | MmAllocateContiguousMemory | 08:24 |
kagamine | my beloved | 08:26 |
TCC jman116 | Creatine Based Turnips | 08:37 |
kagamine | based | 08:44 |
TCC jman116 | kagamine you almost died to fall damage right there | 10:24 |
kagamine | im good | 10:29 |
kagamine | Control registers (CR0, CR1, CR2, CR3, and CR4) determine mode of the processor and the characteristics of the executing task | 10:29 |
TCC jman116 | woulda been kinda funny you know | 10:30 |
TCC jman116 | ur goated* | 10:38 |
kagamine | CR0 - Contains system control flags that control operating mode and states of the processor | 10:38 |
kagamine | omg | 11:08 |
kagamine | CR2 - Contains the page-fault linear address (the linear address that caused a page fault). | 11:12 |
coin | why | 11:22 |
kagamine | The MmMapLockedPagesSpecifyCache routine maps the physical pages that are described by an MDL to a virtual address, and enables | 11:29 |
Precipice | ᗜᴗᗜ | 11:37 |
TCC jman116 | observed | 12:54 |
kagamine | CR3 - Contains the physical address of the base of the paging-structure hierarchy and two flags (PCD and PWT). | 14:38 |
TCC jman116 | macus just swithc to different class then to scout if it doenst work | 15:37 |
TCC jman116 | so you dont die liek that | 15:40 |
coin | throwing | 16:57 |
coin | smh | 16:58 |
bobbybasketball_2006 | bro took my soldier spot | 17:05 |
custodian | wtf lol | 17:16 |
custodian | how | 17:17 |
litr0 | wa | 17:25 |
kagamine | based | 17:47 |
TCC jman116 | c | 17:51 |
kagamine | tWORM | 18:09 |
TCC jman116 | height there was good macus but you should try to keep it | 18:36 |
TCC jman116 | maybe climb higher | 18:39 |
kagamine | CR2 - Contains the page-fault linear address (the linear address that caused a page fault). | 18:59 |
Shronk | holy shit coin | 19:23 |
coin | hi | 19:28 |
custodian | :D | 19:38 |
kagamine | CR3 - Contains the physical address of the base of the paging-structure hierarchy and two flags (PCD and PWT). | 20:32 |
TCC jman116 | it happened. | 21:05 |
kagamine | jman u didnt see that. | 21:07 |
Precipice | meep2k : register me hitting your wife | 21:12 |
Kirkln | we all saw | 21:18 |
Precipice | no saw | 21:28 |
kagamine | whats ur favorite x86 register | 21:28 |
kagamine | go | 21:29 |
custodian | :D | 21:29 |
custodian | r u doing x86 | 21:36 |
custodian | pain | 21:38 |
bobbybasketball_2006 | LOL | 21:46 |
coin | dude! | 21:53 |
kagamine | CR4 - Contains a group of flags that enable several architectural extensions and processor capabilities. | 22:24 |
TCC jman116 | YOU KNOW WHO ELSE | 22:29 |
kagamine | CR8 - Provides read and write access to the Task Priority Register (TPR) | 22:34 |
kagamine | they arte scared of shortstop | 23:02 |
kagamine | nice try noob | 24:35 |
kagamine | The operating system uses a memory descriptor list (MDL) to describe the physical page layout for a virtual memory buffer. | 25:52 |
kagamine | An MDL consists of an MDL structure that is followed by an array of data that describes the physical memory in which the I/O bu | 27:47 |
kagamine | so close | 28:15 |
ed | l;ol | 28:19 |
coin | ChocolateTheNoob. | 29:08 |
shawty hexd 999 | CoinTheNoob.. | 29:14 |
TCC jman116 | starman im gonna have a question for you after this | 29:18 |
TCC jman116 | i am mentally eclipsed | 29:25 |
kagamine | 'do u wanna kiss' | 29:25 |
solstice | cope | 29:26 |
TCC jman116 | not that idk him | 29:29 |
custodian | gg | 30:06 |
litr0 | gg | 30:08 |
ed | gg | 30:08 |
Precipice | gg | 30:12 |
| [SOAP] Plugins reloaded. | 30:14 |